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1 for more information www.linear.com/ltm4622 typical application features description dual ultrathin 2.5a step-down dc/dc module regulator the lt m ? 4622 is a complete dual 2.5a step-down switch- ing mode module ? (micromodule) regulator in a tiny ultrathin 6.25mm 6.25mm 1.82mm lga package. included in the package are the switching controller , power fets , inductor and support components. operating over an input voltage range of 3.6v to 20v, the ltm4622 sup- ports an output voltage range of 0.6v to 5.5v, set by a single external resistor. its high efficiency design delivers dual 2.5a continuous, 3a peak, output current. only a few ceramic input and output capacitors are needed. the ltm4622 supports selectable burst mode operation and output voltage tracking for supply rail sequencing. its high switching frequency and current mode control enable a very fast transient response to line and load changes without sacrificing stability. fault protection features include input overvoltage , output overcurrent and overtemperature protection. the ltm4622 is rohs compliant with pb-free finish. 1.5v and 1v dual output dc/dc step-down module regulator 1.5v output efficiency vs load current applications n complete solution in <1cm 2 n wide input voltage range: 3.6v to 20v n 3.3v input compatible with v in tied to intv cc n 0.6v to 5.5v output voltage n dual 2.5a dc, 3a peak output current n 1.5% maximum total output voltage regulation error over load, line and temperature n current mode control, fast transient response n external frequency synchronization n multiphase parallelable with current sharing n output voltage tracking and soft-start capability n selectable burst mode ? operation n overvoltage input and overtemperature protection n power good indicators n 6.25mm 6.25mm 1.82mm lga package n general purpose point of load conversion n telecom, networking and industrial equipment n medical diagnostic equipment n test and debug systems l, lt , lt c , lt m , module, burst mode, polyphase, linear technology and the linear logo are registered trademarks and ltpowercad is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. load current (a) 0 efficiency (%) 80 85 90 3 4622 ta01b 75 70 60 65 0.5 1.0 1.5 2.0 2.5 95 v in = 5v v in = 12v 90.9k 4622 ta01a 4.7f 25v v in 3.6v to 20v v out1 1v, 2.5a 47f v out1 v out2 1.5v, 2.5a 47f v out2 fb1 comp1 comp2 gnd ltm4622 pgood1 pgood2 v in run1 run2 intv cc sync/mode track/ss1 track/ss2 freq 40.2k fb2 ltm4622 4622f
2 for more information www.linear.com/ltm4622 pin configuration absolute maximum ratings v in ............................................................. C0.3 v to 22 v v out ............................................................. C0.3 v to 6 v pgood 1, pgood 2 ..................................... C0.3 v to 18 v run 1, run 2 .................................... C0.3 v to v in + 0.3 v intv cc , track / ss 1, track / ss 2 ............ C0.3 v to 3.6 v sync / mode , comp 1, comp 2, fb 1, fb 2 ............................................... C0.3 v to intv cc operating internal temperature range ( note 2) .................................................. C40 c to 125 c storage temperature range .................. C55 c to 125 c peak solder reflow body temperature ................. 245 c (note 1) (see pin functions, pin configuration table) lga package 25-lead (6.25mm 6.25mm 1.82mm) top view comp2 sync/ mode freq v out1 fb1 pgood1 track/ss1 a 5 1 2 3 4 pgood2 fb2 track/ss2 intv cc run2 b c d e comp1 gnd gnd run1 gnd v in v in v in v in v out2 t jmax = 125c, t jctop = 17c/w, t jcbottom = 11c/w, t jb + t ba = 22c/w, t ja = 22c/w, weight = 0.21g electrical characteristics the l denotes the specifications which apply over the full internal operating temperature range (note 2). specified as each individual output channel at t a = 25c, v in = 12v, unless otherwise noted per the typical application shown in figure 24. order information symbol parameter conditions min typ max units switching regulator section: per channel v in input dc voltage l 3.6 20 v v in_3.3 3.3v input dc voltage v in = intv cc = 3.3v l 3.1 3.3 3.5 v v out(range) output voltage range v in = 3.6v to 20v l 0.6 5.5 v v out(dc) output voltage, total variation with line and load c in = 22f, c out = 100f ceramic, r fb = 40.2k, mode = intv cc ,v in = 3.6v to 20v, i out = 0a to 2.5a l 1.477 1.50 1.523 v v run run pin on threshold run threshold rising run threshold falling 1.20 0.97 1.27 1.00 1.35 1.03 v v i q(vin) input supply bias current v in = 12v, v out = 1.5v, mode = gnd v in = 12v, v out = 1.5v, mode = intv cc shutdown, run1 = run2 = 0 11 500 45 ma a a i s(vin) input supply current v in = 12v, v out = 1.5v, i out = 2.5a 0.35 a i out(dc) output continuous current range v in = 12v, v out = 1.5v (note 3) l 0 2.5 a v out (line)/v out line regulation accuracy v out = 1.5v, v in = 3.6v to 20v, i out = 0a l 0.01 0.1 %/v part number pad or ball finish part marking* package type msl rating temperature range (note 2) device finish code lt m 4622ev#pbf au (rohs) lt m 4622v e4 lga 3 C40c to 125c lt m 4622iv#pbf au (rohs) lt m 4622v e4 lga 3 C40c to 125c consult marketing for parts specified with wider operating temperature ranges. *device temperature grade is indicated by a label on the shipping container . pad or ball finish code is per ipc/jedec j-std-609. ? pb-free and non-pb-free part markings: www .linear .com/leadfree ? recommended lga and bga pcb assembly and manufacturing procedures: www .linear .com/umodule/pcbassembly ? lga and bga package and tray drawings: www .linear .com/packaging ltm4622 4622f
3 for more information www.linear.com/ltm4622 electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm4622 is tested under pulsed load conditions such that t j t a . the ltm4622e is guaranteed to meet performance specifications over the 0c to 125c internal operating temperature range. specifications over the full C40c to 125c internal operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm4622i is guaranteed to meet specifications over the full C40c to 125c internal operating temperature range. note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. symbol parameter conditions min typ max units v out (load)/v out load regulation accuracy v out = 1.5v, i out = 0a to 2.5a l 0.2 1.0 % v out(ac) output ripple voltage i out = 0a, c out = 100f ceramic, v in = 12v, v out = 1.5v 5 mv v out( start) turn -on overshoot i out = 0a, c out = 100f ceramic, v in = 12v, v out = 1.5v 30 mv t start turn -on time c out = 100f ceramic, no load, track/ ss = 0.01f , v in = 12v, v out = 1.5v 2.5 ms v outls peak deviation for dynamic load load: 0% to 50% to 0% of full load, c out = 100f ceramic, v in = 12v, v out = 1.5v 100 mv t settle settling time for dynamic load step load: 0% to 50% to 0% of full load, c out = 100f ceramic, v in = 12v, v out = 1.5v 20 s i outpk output current limit v in = 12v, v out = 1.5v 3 4 a v fb voltage at fb pin i out = 0a, v out = 1.5v l 0.592 0.60 0.608 v i fb current at fb pin (note 4) 30 na r fbhi resistor between v out and fb pins 60.00 60.40 60.80 k i track/ss track pin soft-start pull-up current track/ss = 0v 1.4 a t ss internal soft-start time 10% to 90% rise time (note 4) 400 700 s t on(min) minimum on- time (note 4) 20 ns t off(min) minimum off- time (note 4) 45 ns v pgood pgood trip level v fb with respect to set output v fb ramping negative v fb ramping positive C8 8 C14 14 % % r pgood pgood pull-down resistance 1ma load 20 v intvcc internal v cc voltage v in = 3.6v to 20v 3.1 3.3 3.5 v v intvcc load reg intv cc load regulation i cc = 0ma to 50ma, v in = 3.6v to 20v 1.3 % f osc oscillator frequency 1 mhz f sync sync capture range with respect to set frequency 30 % i mode mode input current mode = intv cc C1.5 a note 3: see output current derating curves for different v in , v out and t a . note 4: 100% tested at wafer level. note 5: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the specified maximum operating junction temperature may impair device reliability. the l denotes the specifications which apply over the full internal operating temperature range (note 2). specified as each individual output channel at t a = 25c, v in = 12v, unless otherwise noted per the typical application shown in figure 24. ltm4622 4622f
4 for more information www.linear.com/ltm4622 typical performance characteristics 1v output transient response 1.8v output transient response 2.5v output transient response efficiency vs load current at 5v in efficiency vs load current at 12v in burst mode efficiency, 12v in , 1.5v out load current (a) efficiency (%) 4622 g01 0 80 85 90 3 75 70 60 65 0.5 1.0 1.5 2.0 2.5 95 2.5v, 1.5mhz 1.5v, 1mhz 1.0v, 1mhz 1.2v, 1mhz 1.8v, 1mhz 3.3v, 2mhz output: load current (a) efficiency (%) 4622 g02 0 80 85 90 3 75 70 60 65 0.5 1.0 1.5 2.0 2.5 95 3.3v, 2mhz 1.8v, 1mhz 1.2v, 1mhz 1.0v, 1mhz 1.5v, 1mhz 2.5v, 1.5mhz 5.0v, 2.5mhz output: v out 100mv/div ac-coupled load step 1a/div v in = 12v v out = 1v f s = 1mhz output capacitor = 1 47f ceramic load step = 1.25a to 2.5a 20s/div 4622 g04 v out 100mv/div ac-coupled load step 1a/div v in = 12v v out = 1.8v f s = 1mhz output capacitor = 1 47f ceramic load step = 1.25a to 2.5a 20s/div 4622 g07 v out 100mv/div ac-coupled load step 1a/div v in = 12v v out = 2.5v f s = 1.5mhz output capacitor = 1 47f ceramic load step = 1.25a to 2.5a 20s/div 4622 g08 load current (a) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.01 0.1 1 4622 g03 0 burst mode operation ccm v out 100mv/div ac-coupled load step 1a/div v in = 12v v out = 1.2v f s = 1mhz output capacitor = 1 47f ceramic load step = 1.25a to 2.5a 20s/div 4622 g05 v out 100mv/div ac-coupled load step 1a/div v in = 12v v out = 1.5v f s = 1mhz output capacitor = 1 47f ceramic load step = 1.25a to 2.5a 20s/div 4622 g06 1.5v output transient response 1.2v output transient response efficiency vs load current at 3.3v in load current (a) efficiency (%) 4622 g02b 0 80 85 90 3 75 70 60 65 0.5 1.0 1.5 2.0 2.5 95 1.8v, 1mhz 1.2v, 1mhz 1.0v, 1mhz 1.5v, 1mhz 2.5v, 1.5mhz output: ltm4622 4622f
5 for more information www.linear.com/ltm4622 3.3v output transient response 5v output transient response start-up with no load current applied start-up with 2.5a load current applied recover from short-circuit with no load current applied short-circuit with no load current applied short-circuit with 2.5a load current applied steady-state output voltage ripple start-up into pre-biased output typical performance characteristics v out 100mv/div ac-coupled load step 1a/div v in = 12v v out = 3.3v f s = 2mhz output capacitor = 1 47f ceramic load step = 1.25a to 2.5a 20s/div 4622 g09 v out 100mv/div ac-coupled load step 1a/div v in = 12v v out = 5v f s = 2.5mhz output capacitor = 1 47f ceramic load step = 1.25a to 2.5a 20s/div 4622 g10 sw 10v/div v out 1v/div run 10v/div v in = 12v v out = 1.8v f s = 1mhz input capacitor = 1 22f output capacitor = 1 22f + 1 47f ceramic soft-start cap = 0.1 f 20ms/div 4622 g11 sw 10v/div v out 1v/div run 10v/div v in = 12v v out = 1.8v f s = 1mhz input capacitor = 1 22f output capacitor = 1 22f + 1 47f ceramic soft-start cap = 0.1 f 200ms/div 4622 g12 sw 10v/div v out 1v/div i in 2a/div v in = 12v v out = 1.8v f s = 1mhz input capacitor = 1 22f output capacitor = 1 22f + 1 47f ceramic 20s/div 4622 g13 sw 10v/div v out 1v/div i in 2a/div v in = 12v v out = 1.8v f s = 1mhz input capacitor = 1 22f output capacitor = 1 22f + 1 47f ceramic 20s/div 4622 g15 v out 10mv/div ac-coupled sw 5v/div v in = 12v v out = 1.8v f s = 1mhz input capacitor = 1 22f output capacitor = 1 22f + 1 47f ceramic 1s/div 4622 g16 sw 10v/div v out 1v/div i in 500ma/div v in = 12v v out = 1.8v f s = 1mhz input capacitor = 1 22f output capacitor = 1 22f + 1 47f ceramic 20s/div 4622 g14 sw 10v/div v out 1v/div run 10v/div v in = 12v v out = 1.8v f s = 1mhz input capacitor = 1 22f output capacitor = 1 22f + 1 47f ceramic 50ms/div 4622 g17 ltm4622 4622f
6 for more information www.linear.com/ltm4622 pin functions v in ( a 2, b 3, d 3, e 2): power input pins . apply input voltage between these pins and gnd pins. recommend placing input decoupling capacitance directly between v in pins and gnd pins. gnd (c1 to c2, b5, d5): power ground pins for both input and output returns. intv cc (c3): internal 3.3v regulator output. the internal power drivers and control circuits are powered from this voltage . this pin is internally decoupled to gnd with a 2.2f low esr ceramic capacitor. no additional external decoupling capacitor needed. sync/mode (c5): mode select and external synchroni- zation input. tie this pin to ground to force continuous synchronous operation at all output loads. floating this pin or tying it to intv cc enables high efficiency burst mode operation at light loads. drive this pin with a clock to synchronize the ltm4622 switching frequency. an internal phase-locked loop will force the bottom power nmoss turn on signal to be synchronized with the rising edge of the clock signal. when this pin is driven with a clock, forced continuous mode is automatically selected. v out1 (d1, e1), v out2 (a1, b1): power output pins of each switching mode regulator. apply output load between these pins and gnd pins. recommend placing output decoupling capacitance directly between these pins and gnd pins. freq (c4): frequency is set internally to 1mhz. an ex- ternal resistor can be placed from this pin to sgnd to increase frequency, or from this pin to intv cc to reduce frequency. see the applications information section for frequency adjustment. run 1 ( d2), run 2 ( b2): run control input of each switch - ing mode regulator channel. enables chip operation by tying run above 1.22v. tying this pin below 1v shuts down the specific regulator channel. do not float this pin. pgood1 (d4), pgood2 (b4): output power good with open-drain logic of each switching mode regulator channel. pgood is pulled to ground when the voltage on the fb pin is not within 8% (typical) of the internal 0.6v reference. track / ss1 (e 3), track / ss2 (a 3): output tracking and soft-start pin of each switching mode regulator channel. it allows the user to control the rise time of the output voltage. putting a voltage below 0.6v on this pin bypasses the internal reference input to the error ampli- fier, instead it servos the fb pin to the track voltage. above 0.6v, the tracking function stops and the internal reference resumes control of the error amplifier. theres an internal 1.4a pull-up current from intv cc on this pin, so putting a capacitor here provides soft-start function. a default internal soft-start ramp forces a minimum soft- start time of 400ms. fb1 (e4), fb2 (a4): the negative input of the error ampli- fier for each switching mode regulator channel. inter - nally, this pin is connected to v out with a 60.4k precision resistor. different output voltages can be programmed with an additional resistor between fb and gnd pins. in polyphase ? operation, tying the fb pins together allows for parallel operation. see the applications information section for details. comp1 (e5), comp2 (a5): current control threshold and error amplifier compensation point of each switch- ing mode regulator channel . the current comparators trip threshold is linearly proportional to this voltage, whose normal range is from 0.3v to 1.8v. tie the comp pins together for parallel operation. the device is internal compensated. do not drive this pin. package row and column labeling m ay vary among module products. review each package layout carefully. ltm4622 4622f
7 for more information www.linear.com/ltm4622 block diagram decoupling requirements symbol parameter conditions min typ max units c in external input capacitor requirement (v in = 3.6v to 20v, v out = 1.5v) i out = 2.5a 4.7 10 f c out external output capacitor requirement (v in = 3.6v to 20v, v out = 1.5v) i out = 2.5a 22 47 f figure 1. simplified ltm4622 block diagram power control fb2 60.4k 2.2f 0.1f 40.2k 0.22f 22f intv cc v out2 track/ss2 0.1f track/ss1 run1 run2 sync/mode comp1 1f v out1 v in 10k pgood1 v out1 1.2v 2.5a v in 3.6v to 20v intv cc gnd 1h 4622 bd freq 324k internal comp comp2 fb1 60.4k 60.4k v out1 10k pgood2 intv cc 47f 0.22f 1f v out2 v out2 1.5v 2.5a gnd 1h 47f internal comp ltm4622 4622f
8 for more information www.linear.com/ltm4622 operation applications information the ltm4622 is a dual output standalone non-isolated switch mode dc/dc power supply. it can deliver two 2.5a dc , 3a peak output current with few external input and output ceramic capacitors. this module provides dual precisely regulated output voltage programmable via two external resistor from 0.6v to 5.5v over 3.6v to 20v input voltage range. with intv cc tied to v in , this module is able to operate from 3.3v input. the typical application schematic is shown in figure 24. the ltm4622 contains an integrated controlled on-time valley current mode regulator, power mosfets , inductor, and other supporting discrete components. the default switching frequency is 1mhz . for output voltages between 2.5v and 5.5v, an external resistor is required between freq and sgnd pins to set the operating frequency to higher frequency to optimize inductor current ripple. for switching noise - sensitive applications , the switching frequency can be adjusted by external resistors and the module regulator can be externally synchronized to a clock within 30% of the set frequency. see the applica- tions information section. with current mode control and internal feedback loop compensation , the ltm 4622 module has sufficient stability margins and good transient performance with a wide range of output capacitors, even with all ceramic output capacitors. current mode control provides cycle-by-cycle fast cur - rent limiting. an internal overvoltage and undervoltage comparators pull the open-drain pgood output low if the output feedback voltage exits a 8% window around the regulation point . furthermore , an input overvoltage protec - tion been utilized by shutting down both power mosfets when v in rises above 22.5v to protect internal devices . multiphase operation can be easily employed by connecting sync pin to an external oscillator. up to 6 phases can be paralleled to run simultaneously a good current sharing guaranteed by current mode control loop. pulling the run pin below 1v forces the controller into its shutdown state, turning off both power mosfets and most of the internal control circuitry . at light load currents, burst mode operation can be enabled to achieve higher efficiency compared to continuous mode (ccm) by set- ting mode pin to intv cc . the track/ss pin is used for power supply tracking and soft-start programming. see the applications information section. the typical ltm 4622 application circuit is shown in figure 24 . external component selection is primarily determined by the input voltage, the output voltage and the maximum load current. refer to table 6 for specific external capacitor requirements for a particular application . v in to v out step-down ratios there are restrictions in the maximum v in and v out step down ratio that can be achieved for a given input voltage due to the minimum off-time and minimum on-time limits of the regulator. the minimum off-time limit imposes a maximum duty cycle which can be calculated as d max = 1 C t off(min) ? f sw where t off(min) is the minimum off-time, 45ns typical for ltm4622, and f sw is the switching frequency. conversely the minimum on-time limit imposes a minimum duty cycle of the converter which can be calculated as d min = t on(min) ? f sw where t on(min) is the minimum on-time, 20ns typical for ltm4622. in the rare cases where the minimum duty cycle is surpassed, the output voltage will still remain in regulation, but the switching frequency will decrease from its programmed value. these constraints are shown in the typical performance characteristic curve labeled v in to v out step-down ratio. note that additional thermal derating may be applied. see the thermal considerations and output current derating section in this data sheet. ltm4622 4622f
9 for more information www.linear.com/ltm4622 applications information output decoupling capacitors with an optimized high frequency, high bandwidth design, only single piece of 22f low esr output ceramic capaci- tor is required for each ltm4622 output to achieve low output voltage ripple and very good transient response. additional output filtering may be required by the sys- tem designer, if further reduction of output ripples or dynamic transient spikes is required. table 6 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 1.25a (50%) load step transient. multiphase operation will reduce effective output ripple as a function of the number of phases. application note 77 discusses this noise reduction versus output ripple current cancella- tion, but the output capacitance will be more a function of stability and transient response. the linear technology ltpowercad ? design tool is available to download online for output ripple, stability and transient response analysis and calculating the output ripple reduction as the number of phases implemented increases by n times. burst mode operation in applications where high efficiency at intermediate current are more important than output voltage ripple, burst mode operation could be used by connecting sync/mode pin to intv cc to improve light load efficiency. in burst mode operation, a current reversal comparator (i rev ) detects the negative inductor current and shuts off the bottom power mosfet, resulting in discontinuous operation and increased efficiency. both power mosfets will remain off and the output capacitor will supply the load current until the comp voltage rises above the zero current level to initiate another cycle. force continuous current mode (ccm) operation in applications where fixed frequency operation is more critical than low current efficiency, and where the lowest output ripple is desired, forced continuous operation should be used. forced continuous operation can be enabled by tying the sync/mode pin to gnd. in this mode, inductor current is allowed to reverse during low output loads, the comp voltage is in control of the current comparator threshold throughout, and the top mosfet output voltage programming the pwm controller has an internal 0.6 v reference voltage . as shown in the block diagram, a 60.4k 0.5% internal feedback resistor connects v out and fb pins together. adding a resistor r fb from fb pin to gnd programs the output voltage: r fb = 0.6v v out C 0.6v ? 60.4k table 1. v fb resistor table vs various output voltages v out (v) 0.6 1.0 1.2 1.5 1.8 2.5 3.3 5.0 r fb (k) open 90.9 60.4 40.2 30.1 19.1 13.3 8.25 pease note that for 2.5 to 5v output, a higher operating frequency is required to optimize inductor current ripple. see operating frequency section. for parallel operation of n-channels ltm4622, the follow- ing equation can be used to solve for r fb : r fb = 0.6v v out C 0.6v ? 60.4k n input decoupling capacitors the ltm4622 module should be connected to a low ac- impedance dc source . for each regulator channel , one piece 4.7f input ceramic capacitor is required for rms ripple current decoupling. bulk input capacitor is only needed when the input source impedance is compromised by long inductive leads, traces or not enough source capacitance. the bulk capacitor can be an electrolytic aluminum capaci- tor and polymer capacitor. without considering the inductor current ripple, for each output, the rms current of the input capacitor can be estimated as: i cin(rms) = i out(max) % ? d ? 1Cd ( ) where is the estimated efficiency of the power module. ltm4622 4622f
10 for more information www.linear.com/ltm4622 applications information always turns on with each oscillator pulse . during start - up, forced continuous mode is disabled and inductor current is prevented from reversing until the ltm4622s output voltage is in regulation. operating frequency the operating frequency of the ltm4622 is optimized to achieve the compact package size and the minimum out- put ripple voltage while still keeping high efficiency. the default operating frequency is internally set to 1mhz. in most applications, no additional frequency adjusting is required. if any operating frequency other than 1mhz is required by application, the operating frequency can be increased by adding a resistor, r fset , between the freq pin and sgnd, as shown in figure 26. the operating frequency can be calculated as: f hz ( ) = 3.2e11 324k||r fset ( ) to reduce switching current ripple , 1.5mhz to 2.5mhz operating frequency is required for 2.5v to 5.5v output with r fset to sgnd. v out 0.6v to 1.8v 2.5v 3.3v 5v f sw 1mhz 1.5mhz 2mhz 2.5mhz r fset open 649k? 324k? 215k? the operating frequency can also be decreased by adding a resistor between the freq pin and intv cc , calculated as: f hz ( ) = 1mhz ? 5.67e11 r fset ( ) the programmable operating frequency range is from 800khz to 4mhz. frequency synchronization the power module has a phase-locked loop comprised of an internal voltage controlled oscillator and a phase detector. this allows the internal top mosfet turn-on to be locked to the rising edge of the external clock. the external clock frequency range must be within 30% around the set operating frequency. a pulse detection circuit is used to detect a clock on the sync/mode pin to turn on the phase-locked loop. the pulse width of the clock has to be at least 100ns. the clock high level must be above 2v and clock low level below 0.3v. the presence of an external clock will place both regulator channels into forced continuous mode operation. during the start-up of the regulator, the phase-locked loop function is disabled. multiphase operation for output loads that demand more than 2.5a of current, two outputs in the ltm4622 or even multiple ltm4622s can be paralleled to run out of phase to provide more output current without increasing input and output voltage ripples . a multiphase power supply significantly reduces the amount of ripple current in both the input and output ca- pacitors. the rms input ripple current is reduced by, and the effective ripple frequency is multiplied by, the number of phases used (assuming that the input voltage is greater than the number of phases used times the output voltage). the output ripple amplitude is also reduced by the number of phases used when all of the outputs are tied together to achieve a single high output current design. the two switching mode regulator channels inside the ltm4622 are internally set to operate 180 out of phase. multiple ltm4622s could easily operate 90 degrees, 60 degrees or 45 degrees shift which corresponds to 4- phase , 6-phase or 8-phase operation by letting sync/ mode of the ltm4622 synchronize to an external multiphase oscillator like lt c ? 6902. figure 2 shows a 4-phase design example for clock phasing. figure 2. example of clock phasing for 4-phase operation with ltc6902 4622 f02 v + 3.3v intv cc ph set ltc6902 33.2k, 1.5mhz 0 sync/mode v out1 10a 180 v out2 div gnd 90 sync/mode v out1 270 0 90 v out2 mod out1 out2 ltm4622 4622f
11 for more information www.linear.com/ltm4622 the ltm4622 device is an inherently current mode con- trolled device, so parallel modules will have very good current sharing. this will balance the thermals on the design. please tie run, track/ss, fb and comp pin of each paralleling channel together. figure 28 shows an example of parallel operation and pin connection. input rms ripple current cancellation application note 77 provides a detailed explanation of multiphase operation. the input rms ripple current can- cellation mathematical derivations are presented, and a graph is displayed representing the rms ripple current reduction as a function of the number of interleaved phases . figure 3 shows this graph. soft-start and output voltage tracking the track/ ss pin provides a means to either soft- start the regulator or track it to a different power supply. a capacitor on the track / ss pin will program the ramp rate of the output voltage. an internal 1.4a current source will charge up the external soft- start capacitor towards intv cc voltage. when the track/ ss voltage is below 0.6v , it will take over the internal 0.6v reference voltage to control the output voltage. the total soft- start time can be calculated as: t ss = 0.6 ? c ss 1.4a where c ss is the capacitance on the track / ss pin . current foldback and force continuous mode are disabled during the soft-start process. the ltm4622 has internal 400s soft-start time when track/ss leave floating. output voltage tracking can also be programmed externally using the track/ss pin. the output can be tracked up and applications information figure 3. input rms current ratios to dc load current as a function of duty cycle 0.75 0.8 4622 f03 0.70.650.60.550.50.450.40.350.30.250.20.150.1 0.85 0.9 duty factor (v out /v in ) 0 dc load current rms input ripple current 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 0.55 0.60 1-phase 2-phase 3-phase 4-phase 6-phase ltm4622 4622f
12 for more information www.linear.com/ltm4622 applications information down with another regulator. figure 4 and figure 5 show an example waveform and schematic of a ratiometric tracking where the slave regulators output slew rate is proportional to the masters. since the slave regulators track/ss is connected to the masters output through a r tr(top) /r tr(bot) resistor r tr(bot) is the resistor divider on the track/ss pin of the slave regulator, as shown in figure 5. following the upper equation, the masters output slew rate (mr) and the slaves output slew rate (sr) in volts / time is determined by: mr sr = r fb(sl) r fb(sl) +60.4k r tr(top) r tr(top) +r tr(bot) for example, v out( ma) = 1.5v , mr = 1.4v /1ms and v out( sl) = 1.2v, sr = 1.2v/1ms. from the equation, we could solve out that r tr(top) =?60.4 k and r tr(bot) = 40.2k is a good combination for the ratiometric tracking. the track pins will have the 1.5a current source on when a resistive divider is used to implement tracking on that specific channel. this will impose an offset on the track pin input. smaller values resistors with the same ratios as the resistor values calculated from the above equation can be used. for example, where the 60.4k is used then a 6.04k can be used to reduce the track pin offset to a negligible value. the coincident output tracking can be recognized as a special ratiometric output tracking which the masters output slew rate (mr) is the same as the slaves output slew rate (sr), as waveform shown in figure 6. figure 5. example schematic of ratiometric output voltage tracking figure 6. output coincident tracking waveform time master output slave output output voltage 4622 f06 divider and its voltage used to regulate the slave output voltage when track/ss voltage is below 0.6v, the slave output voltage and the master output voltage should satisfy the following equation during the start-up. v out(sl) ? r fb(sl) r fb(sl) +60.4k = v out(ma) ? r tr(top) r tr(top) +r tr(bot) the r fb(sl) is the feedback resistor and the r tr(top) / figure 4. output ratiometric tracking waveform time slave output master output output voltage 4622 f04 40.2k 4622 f05 10f 25v v in 4v to 20v v out1 1.5v, 2.5a 47f 4v 0.1f v out1 v out2 1.2v, 2.5a 47f 4v v out2 fb1 comp1 comp2 freq gnd ltm4622 pgood1 pgood2 v in run1 run2 intv cc sync/mode track/ss1 track/ss2 60.4k 40.2k 60.4k fb2 v out1 ltm4622 4622f
13 for more information www.linear.com/ltm4622 applications information from the equation, we could easily find out that, in the coincident tracking, the slave regulators track/ss pin resistor divider is always the same as its feedback divider. r fb(sl) r fb(sl) +60.4k = r tr(top) r tr(top) +r tr(bot) for example, r tr(top) = 60.4k and r tr(bot) = 60.4k is a good combination for coincident tracking for v out(ma) = 1.5v and v out(sl) = 1.2v application. power good the pgood pins are open drain pins that can be used to monitor valid output voltage regulation. this pin monitors a 8% window around the regulation point. a resistor can be pulled up to a particular supply voltage for monitoring. to prevent unwanted pgood glitches during transients or dynamic v out changes, the ltm4622s pgood falling edge includes a blanking delay of approximately 40s. stability compensation the ltm4622 module internal compensation loop is de- signed and optimized for low esr ceramic output capacitors only application. table 7 is provided for most application requirements. the ltpowercad design tool is available to down for control loop optimization. run enable pulling the run pin to ground forces the ltm4622 into its shutdown state, turning off both power mosfets and most of its internal control circuitry . trying the run pin voltage above 1.22v will turn on the entire chip. low input application the ltm4622 is capable to run from 3.3v input when the v in pin is tied to intv cc pin. see figure 27 for the application circuit . please note the intv cc pin has 3.6v absmax voltage rating. pre-biased output start-up there may be situations that require the power supply to start up with a pre-bias on the output capacitors. in this case, it is desirable to start up without discharging that output pre-bias. the ltm4622 can safely power up into a pre-biased output without discharging it. the ltm4622 accomplishes this by forcing discontinuous mode (dcm) operation until the track/ss pin voltage reaches 0.6v reference voltage. this will prevent the bg from turning on during the pre-biased output start-up which would discharge the output. please do not pre-bias ltm 4622 with a voltage higher than intv cc (3.3 v ) voltage . overtemperature protection the internal overtemperature protection monitors the junc - tion temperature of the module . if the junction temperature reaches approximately 160 c, both power switches will be turned off until the temperature drops about 15c cooler. input overvoltage protection in order to protect the internal power mosfet devices against transient voltage spikes, the ltm4622 constantly monitors each v in pin for an overvoltage condition. when v in rises above 22.5v, the regulator suspends operation by shutting off both power mosfets on the correspond- ing channel. once v in drops below 21.5v, the regulator immediately resumes normal operation. the regulator executes its soft-start function when exiting an overvolt - age condition. thermal considerations and output current derating the thermal resistances reported in the pin configura- tion section of the data sheet are consistent with those parameters defined by jesd51-9 and are intended for use with finite element analysis (fea) software modeling tools that leverage the outcome of thermal modeling, simulation, and correlation to hardware evaluation per - formed on a module package mounted to a hardware test ltm4622 4622f
14 for more information www.linear.com/ltm4622 applications information boardalso defined by jesd51-9 ( test boards for area array surface mount package thermal measurements). the motivation for providing these thermal coefficients in found in jesd51-12 (guidelines for reporting and using electronic package thermal information). many designers may opt to use laboratory equipment and a test vehicle such as the demo board to anticipate the module regulators thermal performance in their ap- plication at various electrical and environmental operating conditions to compliment any fea activities. without fea software, the thermal resistances reported in the pin con- figuration section are in-and-of themselves not relevant to providing guidance of thermal performance ; instead, the derating curves provided in the data sheet can be used in a manner that yields insight and guidance pertaining to ones application usage, and can be adapted to correlate thermal performance to ones own application. the pin configuration section typically gives four thermal coefficients explicitly defined in jesd 51-12; these coef- ficients are quoted or paraphrased below: 1. ja , the thermal resistance from junction to ambient, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclo- sure. this environment is sometimes referred to as still air although natural convection causes the air to move. this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. 2. jcbottom , the thermal resistance from junction to ambi- ent, is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. this environment is sometimes referred to as still air although natural convection causes the air to move . this value is determined with the part mounted to a jesd 51-9 defined test board, which does not reflect an actual application or viable operating condition. 3. jctop , the thermal resistance from junction to top of the product case, is determined with nearly all of the component power dissipation flowing through the top of the package. as the electrical connections of the typical module are on the bottom of the package, it is rare for an application to operate such that most of the heat flows from the junction to the top of the part. as in the case of jcbottom , this value may be useful for comparing packages but the test conditions dont generally match the users application. 4. jb , the thermal resistance from junction to the printed circuit board , is the junction - to - board thermal resistance where almost all of the heat flows through the bottom of the module and into the board, and is really the sum of the jcbottom and the thermal resistance of the bottom of the part through the solder joints and through a por - tion of the board. the board temperature is measured a specified distance from the package, using a two sided, two layer board. this board is described in jesd 51-9. figure 7. graphical representation of jesd 51-12 thermal coefficients 4622 f07 module device junction-to-case (top) resistance junction-to-board resistance junction-to-ambient thermal resistance components case (top)-to-ambient resistance board-to-ambient resistance junction-to-case (bottom) resistance junction ambient case (bottom)-to-board resistance ltm4622 4622f
15 for more information www.linear.com/ltm4622 applications information a graphical representation of the aforementioned ther - mal resistances is given in figure 7; blue resistances are contained within the module regulator, whereas green resistances are external to the module. as a practical matter, it should be clear to the reader that no individual or sub-group of the four thermal resistance parameters defined by jesd 51-12 or provided in the pin configuration section replicates or conveys normal operating conditions of a module. for example, in normal board-mounted applications, never does 100% of the devices total power loss (heat) thermally conduct exclu- sively through the top or exclusively through bottom of the module as the standard defines for jctop and jcbottom , respectively . in practice , power loss is thermally dissipated in both directions away from the packagegranted, in the absence of a heat sink and airflow , a majority of the heat flow is into the board. within a sip (system-in-package) module, be aware there are multiple power devices and components dissipating power, with a consequence that the thermal resistances relative to different junctions of components or die are not exactly linear with respect to total package power loss. to reconcile this complication without sacrificing modeling simplicity but also, not ignoring practical realitiesan approach has been taken using fea software modeling along with laboratory testing in a controlled-environment chamber to reasonably define and correlate the thermal resistance values supplied in this data sheet: (1) initially, fea software is used to accurately build the mechanical geometry of the module and the specified pcb with all of the correct material coefficients along with accurate power loss source definitions; (2) this model simulates a software-defined jedec environment consistent with jsed51-9 to predict power loss heat flow and temperature readings at different interfaces that enable the calculation of the jedec- defined thermal resistance values; (3) the model and fea software is used to evaluate the module with heat sink and airflow ; (4) having solved for and analyzed these thermal resistance values and simulated various operating conditions in the software model, a thorough laboratory evaluation replicates the simulated conditions with thermo - couples within a controlled - environment chamber while operating the device at the same power loss as that which was simulated. an outcome of this process and due-diligence yields a set of derating curves provided in other sections of this data sheet. after these laboratory test have been performed and correlated to the module model , then the jb and ba are summed together to correlate quite well with the module model with no airflow or heat sinking in a properly define chamber. this jb + ba value is shown in the pin configuration section figure 8. 1v output power loss figure 9. 1.5v output power loss figure 10. 2.5v output power loss output current (a) 0 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3 4622 f08 1 2 4 5 power loss (w) 12v in 5v in output current (a) 0 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 3 4622 f09 1 2 4 5 power loss (w) 12v in 5v in output current (a) 0 2.5 2.0 1.5 1.0 0.5 0 3 4622 f10 1 2 4 5 power loss (w) 12v in 5v in ltm4622 4622f
16 for more information www.linear.com/ltm4622 applications information figure 14. 12v to 1v derating curve, no heat sink figure 12. 5v output power loss figure 11. 3.3v output power loss figure 13. 5v to 1v derating curve, no heat sink figure 15. 5v to 1.5v derating curve, no heat sink figure 16. 12v to 1.5v derating curve , no heat sink figure 17. 5v to 2.5v derating curve, no heat sink figure 18. 12v to 2.5v derating curve, no heat sink figure 19. 5v to 3.3v derating curve, no heat sink output current (a) 0 3.0 2.5 1.5 1.0 1.0 0.5 0 3 4622 f11 1 2 4 5 power loss (w) 12v in 5v in output current (a) 0 3.0 2.5 1.5 1.0 1.0 0.5 0 3 4622 f12 1 2 4 5 power loss (w) v in = 12v ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f13 50 60 70 100 110 120 output current (a) ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f14 50 60 70 100 110 120 output current (a) ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f15 50 60 70 100 110 120 output current (a) ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f16 50 60 70 100 110 120 output current (a) ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f17 50 60 70 100 110 120 output current (a) ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f18 50 60 70 100 110 120 output current (a) ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f19 50 60 70 100 110 120 output current (a) ltm4622 4622f 400lfm 0lfm 200lfm 400lfm 0lfm 200lfm 400lfm 0lfm 200lfm 400lfm 0lfm 0lfm 200lfm 400lfm 200lfm 400lfm 0lfm 200lfm 400lfm 0lfm 200lfm
17 for more information www.linear.com/ltm4622 applications information figure 21. 12v to 5v derating curve, no heat sink figure 20. 12v to 3.3v derating curve, no heat sink table 2. 1v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja(c/w) figures 13, 14 5, 12 figure 8 0 none 19 C 20 figures 13, 14 5, 12 figure 8 200 none 17 C 18 figures 13, 14 5, 12 figure 8 400 none 17 C 18 table 3. 1.5v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja(c/w) figures 15, 16 5, 12 figure 9 0 none 19 C 20 figures 15, 16 5, 12 figure 9 200 none 17 C 18 figures 15, 16 5, 12 figure 9 400 none 17 C 18 table 4. 2.5v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja(c/w) figures 17, 18 5, 12 figure 10 0 none 19 C 20 figures 17, 18 5, 12 figure 10 200 none 17 C 18 figures 17, 18 5, 12 figure 10 400 none 17 C 18 table 5. 3.3v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja(c/w) figure 19, 20 5, 12 figure 11 0 none 19 C 20 figure 19, 20 5, 12 figure 11 200 none 17 C 18 figure 19, 20 5, 12 figure 11 400 none 17 C 18 table 6. 5v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja(c/w) figure 21 12 figure 12 0 none 19 C 20 figure 21 12 figure 12 200 none 17 C 18 figure 21 12 figure 12 400 none 17 C 18 ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f20 50 60 70 100 110 120 output current (a) ambient temperature (?c) 40 6 5 3 4 2 1 0 80 90 4622 f21 50 60 70 100 110 120 output current (a) ltm4622 4622f 0lfm 200lfm 400lfm 0lfm 200lfm 400lfm
18 for more information www.linear.com/ltm4622 applications information table 7. output voltage response for each regulator channel vs component matrix (refer to figure 24) 1.25a load step typical measured values c in (ceramic) part number value c out1 ( ceramic) part number value c out2 (bulk) part number value murata grm188r61e475ke11# 4.7f, 25v, 0603, x5r murata grm21r60j476me15# 47f, 6.3v, 0805, x5r panasonic 6tpc150m 150f , 6.3v 3.5 2.8 1.4mm murata grm188r 61e 106ma73# 10 f, 25v, 0603, x5r murata grm 188 r 60j 226 mea 0# 22f, 6.3v, 0603, x5r sanyo taiyo yuden tmk212bj475kg-t 4.7f, 25v, 0805, x5r taiyo yuden jmk212bj476mg-t 47f, 6.3v, 0805, x5r v out (v) c in ( ceramic ) (f) c in ( bulk) c out1 (ceramic) (f) c out2 (bulk) (f) c ff (pf) v in (v) droop (mv) p-p derivation (mv) recovery time (s) load step (a) load step slew rate (a/s) r fb (k) 1 10 0 1 x 47 0 0 5, 12 0 103 4 1.25 10 90.9 1 10 0 1 x 10 150 0 5, 12 0 52 10 1.25 10 90.9 1.2 10 0 1 x 47 0 0 5, 12 0 113 4 1.25 10 60.4 1.2 10 0 1 x 10 150 0 5, 12 0 56 10 1.25 10 60.4 1.5 10 0 1 x 47 0 0 5, 12 0 131 8 1.25 10 40.2 1.5 10 0 1 x 10 150 0 5, 12 0 61 14 1.25 10 40.2 1.8 10 0 1 x 47 0 0 5, 12 0 150 8 1.25 10 30.1 1.8 10 0 1 x 10 150 0 5, 12 0 67 16 1.25 10 30.1 2.5 10 0 1 x 47 0 0 5, 12 0 184 8 1.25 10 19.1 2.5 10 0 1 x 10 150 0 5, 12 0 78 20 1.25 10 19.1 3.3 10 0 1 x 47 0 0 5, 12 0 200 12 1.25 10 13.3 3.3 10 0 1 x 10 150 0 5, 12 0 78 35 1.25 10 13.3 5 10 0 1 x 47 0 0 5, 12 0 309 12 1.25 10 8.25 5 10 0 1 x 10 150 0 5, 12 0 114 60 1.25 10 8.25 ltm4622 4622f
19 for more information www.linear.com/ltm4622 applications information and should accurately equal the ja value because ap- proximately 100% of power loss flows from the junction through the board into ambient with no airflow or top mounted heat sink. the 1v, 1.5v, 2.5v, 3.3v and 5v power loss curves in figures 8 to 12 can be used in coordination with the load current derating curves in figures 13 to 21 for calculating an approximate ja thermal resistance for the ltm 4622 ( in two-phase single output operation) with no heat sinking and various airflow conditions. the power loss curves are taken at room temperature, and are increased with mul- tiplicative factors of 1.35 assuming junction temperature at 120c. the derating curves are plotted with the output current starting at 5a and the ambient temperature at 40c. these output voltages are chosen to include the lower and higher output voltage ranges for correlating the thermal resistance. thermal models are derived from several temperature measurements in a controlled tem- perature chamber along with thermal modeling analysis. the junction temperatures are monitored while ambient temperature is increased with and without airflow . the power loss increase with ambient temperature change is factored into the derating curves . the junctions are maintained at 120c maximum while lowering output cur - rent or power with increasing ambient temperature. the decreased output current will decrease the internal module loss as ambient temperature is increased. the monitored junction temperature of 120c minus the ambient operat- ing temperature specifies how much module temperature rise can be allowed. as an example in figure 15 the load current is derated to ~3a at ~102c with no air or heat sink and the power loss for the 12v to 1.5v at 3a output is about 0.95w. the 0.95w loss is calculated with the ~0.7w room temperature loss from the 12v to 1.5v power loss curve at 3a, and the 1.35 multiplying factor. if the 102c ambient temperature is subtracted from the 120c junc- tion temperature, then the difference of 18c divided by 0.95w equals a 19c/w ja thermal resistance. table 3 specifies a 19 C 20c/w value which is very close. table 2 to 6 provide equivalent thermal resistances for 1v, 1.5v, 2.5v, 3.3v and 5v outputs with and without airflow . the derived thermal resistances in table 2 to 6 for the various conditions can be multiplied by the calculated power loss as a function of ambient temperature to derive temperature rise above ambient, thus maximum junction temperature. room temperature power loss can be derived from the ef- ficiency curves in the typical performance characteristics section and adjusted with the above ambient temperature multiplicative factors. the printed circuit board is a 1.6mm thick four layer board with two ounce copper for the two outer layers and one ounce copper for the two inner layers. the pcb dimensions are 95mm 76mm. figure 22 shows a measured temperature picture of the ltm4622 with no heatsink and no airflow , from 12v input down to 3.3v and 5v output with 2.5a dc current on each. figure 22. thermal picture, 12v input, 3.3v and 5v output, 2.5a dc each output with no air flow and no heat sink 4622 f22 ltm4622 4622f
20 for more information www.linear.com/ltm4622 safety considerations the ltm4622 modules do not provide galvanic isolation from v in to v out . there is no internal fuse. if required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. the device does support thermal shutdown and over current protection. layout checklist/example the high integration of ltm4622 makes the pcb board layout very simple and easy. however, to optimize its electrical and thermal performance , some layout consid- erations are still necessary. n use large pcb copper areas for high current paths, including v in , gnd, v out1 and v out2 . it helps to minimize the pcb conduction loss and thermal stress. n place high frequency ceramic input and output capacitors next to the v in , pgnd and v out pins to minimize high frequency noise. applications information n place a dedicated power ground layer underneath the unit. n to minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. n do not put via directly on the pad, unless they are capped or plated over. n use a separated sgnd ground copper area for components connected to signal pins. connect the sgnd to gnd underneath the unit. n for parallel modules, tie the v out , v fb , and comp pins together. use an internal layer to closely con - nect these pins together. the track pin can be tied a common capacitor for regulator soft-start. n bring out test points on the signal pins for monitoring. figure 23 gives a good example of the recommended layout . figure 23. recommended pcb layout 4622 f23 ltm4622 4622f
21 for more information www.linear.com/ltm4622 figure 25. 4v in to 20v in , 1.2v tw o phase in parallel 5a design figure 24. 4v in to 20v in , 1v and 1.8v output at 2.5a design 90.6k 4622 f24 10f v in 4v to 20v v out1 1v, 2.5a 10f 0.1f 0.1f v out1 v out2 1.8v, 2.5a 10f v out2 fb1 comp1 comp2 freq gnd ltm4622 pgood1 pgood2 v in run1 run2 intv cc sync/mode track/ss1 track/ss2 30.1k fb2 30.2k 4622 f25 10f v in 4v to 20v v out 1.2v, 5a 22f 0.1f v out1 v out2 fb1 comp1 comp2 freq gnd ltm4622 pgood1 pgood2 v in run1 run2 intv cc pgood sync/mode track/ss1 track/ss2 fb2 applications information ltm4622 4622f
22 for more information www.linear.com/ltm4622 applications information figure 27. 3.3v in , 1.5v and 1.2v output at 2.5a design with output coincident tracking 13.3k 4622 f26 10f v in 8v to 20v v out1 3.3v, 2.5a 10f 0.1f 0.1f v out1 v out2 5v, 2.5a 10f v out2 fb1 comp1 comp2 freq gnd ltm4622 pgood1 pgood2 v in run1 run2 intv cc sync/mode track/ss1 track/ss2 8.25k fb2 324k figure 26. 8v in to 20v in , 3.3v and 5v output at 2.5a with 2mhz switching frequency 0.1f 60.4k 60.4k v out1 40.2k 4622 f27 10f v in 3.3v v out1 1.5v, 2.5a 10f v out1 v out2 1.2v, 2.5a 10f v out2 fb1 comp1 comp2 freq gnd ltm4622 pgood1 pgood2 v in run1 run2 intv cc sync/mode track/ss1 track/ss2 60.4k fb2 ltm4622 4622f
23 for more information www.linear.com/ltm4622 applications information figure 28. 4 phase, 1v output at 10a design with ltc6902 22.6k 22f v in 4v to 20v v out 1v, 10a 1f 47f 0.1f v out1 v out2 fb1 comp1 comp2 freq gnd ltm4622 pgood1 pgood2 pgood v in run1 run2 intv cc intv cc sync/mode track/ss1 track/ss2 fb2 4622 f28 v out1 v out2 fb1 comp1 comp comp fb comp2 freq gnd ltm4622 pgood1 pgood2 v in run1 run2 intv cc pgood sync/mode track/ss1 track/ss2 fb2 set mod out3 gnd out4 ltc6902 33.2k v + div out2 ph out1 fb ltm4622 4622f
24 for more information www.linear.com/ltm4622 package description ltm4622 component lga pinout pin id function pin id function pin id function pin id function pin id function a1 v out2 a2 v in a3 track/ss2 a4 fb2 a5 comp2 b1 v out2 b2 run2 b3 v in b4 pgood2 b5 gnd c1 gnd c2 gnd c3 intv cc c4 freq c5 sync/mode d1 v out1 d2 run1 d3 v in d4 pgood1 d5 gnd e1 v out1 e2 v in e3 track/ss1 e4 fb1 e5 comp1 package row and column labeling m ay vary among module products. review each package layout carefully. ltm4622 4622f
25 for more information www.linear.com/ltm4622 information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. package top view 4 pin ?a1? corner y x aaa z aaa z detail a package bottom view 3 see notes suggested pcb layout top view 0.000 2.540 1.270 1.270 2.540 2.540 1.270 2.540 1.270 0.3175 0.3175 0.000 e d c b a 12345 pin 1 ?b (25 places) d e e b f g detail a 0.3175 0.3175 lga 25 0613 rev ? ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pin ?a1? lga package 25-lead (6.25mm 6.25mm 1.82mm) (reference ltc dwg # 05-08-1949 rev ?) 7 see notes notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 5. primary datum -z- is seating plane 6. the total number of pads: 25 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature 7 package row and column labeling may vary among module products. review each package layout carefully ! detail b detail b substrate mold cap // bbb z z a symbol a b d e e f g h1 h2 aaa bbb eee min 1.72 0.60 0.27 1.45 nom 1.82 0.63 6.25 6.25 1.27 5.08 5.08 0.32 1.50 max 1.92 0.66 0.37 1.55 0.15 0.10 0.15 notes dimensions total number of lga pads: 25 h2 h1 s yx z? eee ltm4622 4622f
26 for more information www.linear.com/ltm4622 ? linear technology corporation 2015 lt 0615 ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com/ltm4622 related parts package photo part number description comments ltm4623 20v in , 3a step-down module regulator 4v v in 20v, 0.6v v out 5.5v, pll input, clkout, v out tracking, pgood, 6.25mm 6.25mm 1.82mm lga ltm4624 14v in , 4a step-down module regulator 4v v in 14v, 0.6v v out 5.5v, v out tracking, pgood, 6.25mm 6.25mm 5.01mm bga ltm4625 20v in , 5a step-down module regulator 4v v in 20v, 0.6 v v out 5.5v, pll input, clkout, v out tracking, pgood, 6.25mm 6.25mm 5.01mm bga ltm4619 dual 26v, 4a step-down module regulator 4.5v v in 26.5v, 0.8v v out 5v, pll input, v out tracking, pgood, 15mm 15mm 2.82mm lga ltm4618 26v in , 6a step-down module regulator 4.5v v in 26.5v, 0.8v v out 5v, pll input, v out tracking, 9mm 15mm 4.32mm lga ltm4614 dual 5v, 4a module regulator 2.375v v in 5.5v, 0.8v v out 5v, 15mm 15mm 2.82mm lga ltc6902 multiphase oscillator with spread spectrum frequency modulation design resources subject description module design and manufacturing resources design: ? selector guides ? demo boards and gerber files ? free simulation tools manufacturing: ? quick start guide ? pcb design, assembly and manufacturing guidelines ? package and board level reliability module regulator products search 1. sort table of products by parameters and download the result as a spread sheet. 2. search using the quick power search parametric table. techclip videos quick videos detailing how to bench test electrical and thermal performance of module products. digital power system management linear technologys family of digital power supply management ics are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature eeprom for storing user configurations and fault logging. ltm4622 4622f

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